INTERNATIONAL JOURNAL OF SCIENTIFIC DEVELOPMENT AND RESEARCH International Peer Reviewed & Refereed Journals, Open Access Journal ISSN Approved Journal No: 2455-2631 | Impact factor: 8.15 | ESTD Year: 2016
open access , Peer-reviewed, and Refereed Journals, Impact factor 8.15
Low power VLSI design techniques- A detailed review.
Authors Name:
Sakshi Gupta
Unique Id:
IJSDR1606052
Published In:
Volume 1 Issue 6, June-2016
Abstract:
Power dissipation has emerged as an important design parameter in the design of VLSI chips, especially in portable computing and personal communication applications. This paper discusses in detail the various low power dissipation techniques used at different levels of abstractions. It also focuses on the recent new techniques developed for lowering the power dissipation in a VLSI chip and adopted widely by the industry
Keywords:
Low Power, Abstraction Level.
Cite Article:
"Low power VLSI design techniques- A detailed review.", International Journal of Science & Engineering Development Research (www.ijsdr.org), ISSN:2455-2631, Vol.1, Issue 6, page no.292 - 295, June-2016, Available :http://www.ijsdr.org/papers/IJSDR1606052.pdf
Downloads:
000336256
Publication Details:
Published Paper ID: IJSDR1606052
Registration ID:160485
Published In: Volume 1 Issue 6, June-2016
DOI (Digital Object Identifier):
Page No: 292 - 295
Publisher: IJSDR | www.ijsdr.org
ISSN Number: 2455-2631
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