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INTERNATIONAL JOURNAL OF SCIENTIFIC DEVELOPMENT AND RESEARCH
International Peer Reviewed & Refereed Journals, Open Access Journal
ISSN Approved Journal No: 2455-2631 | Impact factor: 8.15 | ESTD Year: 2016
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Volume 9 | Issue 4

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Paper Title:	Implementation of 64-bit BCD Adder using Majority Gates
Authors Name:	Prashu Chauhan , Manoj Bandil
Unique Id:	IJSDR1908034
Published In:	Volume 4 Issue 8, August-2019
Abstract:	As technology is growing very fast, to cope with technology, advance techniques are used for designing circuits or systems. In today’s era low power, high speed and small area are the key parameters of new technique. CMOS technology gives all the mentioned parameters in desired values, still there are some limitations. Quantum-dot cellular automata (QCA) technology provides a promising opportunity to overcome the limits of conventional CMOS technology. This paper explains the design of 64-bit BCD adder using Majority gates. Xilinx 14.5 ISE simulator is used for analysis of this BCD adder.
Keywords:	CMOS, QCA, Majority gates , BCD adder
Cite Article:	"Implementation of 64-bit BCD Adder using Majority Gates", International Journal of Science & Engineering Development Research (www.ijsdr.org), ISSN:2455-2631, Vol.4, Issue 8, page no.217 - 223, August-2019, Available :http://www.ijsdr.org/papers/IJSDR1908034.pdf
Downloads:	000337073
Publication Details:	Published Paper ID: IJSDR1908034 Registration ID:190929 Published In: Volume 4 Issue 8, August-2019 DOI (Digital Object Identifier): Page No: 217 - 223 Publisher: IJSDR \| www.ijsdr.org ISSN Number: 2455-2631

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