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ISSN Approved Journal No: 2455-2631 | Impact factor: 8.15 | ESTD Year: 2016
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Paper Title:	Design and performance analysis of aging aware reliable multiplier with adaptive hold logic
Authors Name:	Pooja Beniwal , Monika Gupta
Unique Id:	IJSDR1707046
Published In:	Volume 2 Issue 7, July-2017
Abstract:	Multipliers are the major elements to perform arithmetic function in devices but aging effect degrades the speed of multipliers and in long term system may fail due to timing violations. . For reducing these timing violations an aging aware multiplier with adaptive hold logic is designed. Performance analysis of an aging-aware variable latency multiplier design with different adders is done in this paper. An aging-aware reliable multiplier where column/row bypassing multiplier is designed with carry save adder and another aging aware reliable multiplier where column/row bypassing multiplier is designed with Brent Kung Adder to reduce the aging induced degradation of multiplier further. The performance evaluation is done on Xilinx 14.7, coding is done using Verilog.
Keywords:	Negative bias temperature instability (NBTI), Positive bias temperature instability (PBTI), Hot carrier injection ( HCD), Electro migration (EM), Carry save adder (CSA), Brent Kung adder ( BKA), Row bypassing multiplier (RBM), Column bypassing multiplier (CBM).
Cite Article:	"Design and performance analysis of aging aware reliable multiplier with adaptive hold logic ", International Journal of Science & Engineering Development Research (www.ijsdr.org), ISSN:2455-2631, Vol.2, Issue 7, page no.276 - 286, July-2017, Available :http://www.ijsdr.org/papers/IJSDR1707046.pdf
Downloads:	000337349
Publication Details:	Published Paper ID: IJSDR1707046 Registration ID:170646 Published In: Volume 2 Issue 7, July-2017 DOI (Digital Object Identifier): Page No: 276 - 286 Publisher: IJSDR \| www.ijsdr.org ISSN Number: 2455-2631

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