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INTERNATIONAL JOURNAL OF SCIENTIFIC DEVELOPMENT AND RESEARCH International Peer Reviewed & Refereed Journals, Open Access Journal ISSN Approved Journal No: 2455-2631 | Impact factor: 8.15 | ESTD Year: 2016 open access , Peer-reviewed, and Refereed Journals, Impact factor 8.15 |
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| Paper Title: | UVM Based Verification Environment for Configurable SPI. |
| Authors Name: | Aayushi Dey , Bhavini Kumawat |
| Unique Id: | IJSDR2112037 |
| Published In: | Volume 6 Issue 12, December-2021 |
| Abstract: | In today’s world, more and more functionalities in the form of reusable verification environment cores are integrated into a single chip or SOC. The complexity of system level verification of large SOCs is much higher. The solution to this problem is to provide a reusable and pre defined verification environment cores. The verification environments are independent, scalable, and have reusable verification components. The SystemVerilog language is based on Object Oriented Programming tool and is the widely used language to develop a complete verification environment with functional coverage, constrained random testing and assertions. The UVM, written in SystemVerilog, is a base class library of reusable verification components. It is an open source System Verilog library that aims to form the verification process flexible by creating reusable verification components and assembling powerful test environments using constrained random stimulus generation and functional coverage methodologies. This paper discusses a UVM based verification environment for testing configurable SPI. A multi layer testbench was developed which consists of a SPI master slave model, driver, scoreboard, coverage analysis, and assertions developed using various properties of SystemVerilog and the UVM library. Later, constrained random testing using vectors driven into the DUT for higher functional coverage is discussed. The result shows the effectiveness and feasibility of the proposed verification environment. |
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| Cite Article: | "UVM Based Verification Environment for Configurable SPI.", International Journal of Science & Engineering Development Research (www.ijsdr.org), ISSN:2455-2631, Vol.6, Issue 12, page no.230 - 235, December-2021, Available :http://www.ijsdr.org/papers/IJSDR2112037.pdf |
| Downloads: | 000337214 |
| Publication Details: | Published Paper ID: IJSDR2112037 Registration ID:193726 Published In: Volume 6 Issue 12, December-2021 DOI (Digital Object Identifier): Page No: 230 - 235 Publisher: IJSDR | www.ijsdr.org ISSN Number: 2455-2631 |
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