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ISSN Approved Journal No: 2455-2631 | Impact factor: 8.15 | ESTD Year: 2016
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Paper Title: Efficient Implementation Of PN Sequence Generator Using Vedic Mathematics
Authors Name: Nilima Patle , Prof. Rahul Nawkhare
Unique Id: IJSDR1612009
Published In: Volume 1 Issue 12, December-2016
Abstract: In the wireless communication system security and content privacy of user data is of prime importance. In military application to provided security to the message signal and to overcome the interference problem, we develop the use of pseudo- noise sequence (PN) for spreading digital data in DS-SS (Direct Sequence Spread Spectrum) . PN belongs to the class of Linear Feedback Shift Register (LFSR). In this paper the generation of PN sequence is done using multiplier. In order to reduce processing delay and to consume memory storage during sequence generation we adopted the concept of Vedic multiplier. The whole Vedic mathematics uses 16 sutras (formulas). Among the various method of multiplication Uardhava tiryakbhyam (vertically and crosswise) is discussed in details. It enables the parallel generation of partial products and eliminates unwanted multiplication steps.The modeled is proposed using VHDL and synthesis is done using Xilinx ISE 13.1/13.2 simulator
Keywords: pseudo-noise sequence generator, ,LFSR, digital communication, spread spectrum, Uardhava tiryakbhyam, Vedic Mathematics,VHDL.
Cite Article: "Efficient Implementation Of PN Sequence Generator Using Vedic Mathematics", International Journal of Science & Engineering Development Research (www.ijsdr.org), ISSN:2455-2631, Vol.1, Issue 12, page no.40 - 47, December-2016, Available :http://www.ijsdr.org/papers/IJSDR1612009.pdf
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Publication Details: Published Paper ID: IJSDR1612009
Registration ID:160968
Published In: Volume 1 Issue 12, December-2016
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Page No: 40 - 47
Publisher: IJSDR | www.ijsdr.org
ISSN Number: 2455-2631

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