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ISSN Approved Journal No: 2455-2631 | Impact factor: 8.15 | ESTD Year: 2016
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Paper Title: Design of Low Power and Area Efficient Pulsed Latch Based Shift Register
Authors Name: ANUSHA KORE , Dr. S.A.MUZEER
Unique Id: IJSDR1610028
Published In: Volume 1 Issue 10, October-2016
Abstract: The power consumption and area reduction are the key challenges in the Very Large Scale Integration (VLSI) circuit design. Shift register is the main building block in the VLSI circuits. The shift register is composed of clock inter connection network and timing elements such as flip-Flops and latches. This clock inter connection network and timing element is the main power and area consuming element in the shift register. This project introduces a low power and area efficient shift register using pulsed latch and pulse generation circuit. If the Flip-Flop is replaced with the pulsed latch the area and power consumption can be reduced to 50% in the shift register. Different stages of flip-flops and pulsed latches such as SSASPL (Static differential sense amplifier shared pulsed latch), HLFF (Hybrid latch flip flop), MHLFF (modified Hybrid latch flip flop), ACFF (Adaptive coupling flip flop), TGFF (transmission gate flip flop), EP-DCO (Explicit pulse data close to output flip flop), CCFF (conditional capture flip flop) are compared for analyzing the area and power consumption. The SSASPL is more area and power efficient than the other types. The shift register is designed by using SSASPL combined with pulse generation circuit. All the circuit designs are made by using 90nm technology in DSCH2 schematic tool and MICROWIND design tool.
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Cite Article: "Design of Low Power and Area Efficient Pulsed Latch Based Shift Register", International Journal of Science & Engineering Development Research (www.ijsdr.org), ISSN:2455-2631, Vol.1, Issue 10, page no.166 - 176, October-2016, Available :http://www.ijsdr.org/papers/IJSDR1610028.pdf
Downloads: 000101746
Publication Details: Published Paper ID: IJSDR1610028
Registration ID:160891
Published In: Volume 1 Issue 10, October-2016
DOI (Digital Object Identifier):
Page No: 166 - 176
Publisher: IJSDR | www.ijsdr.org
ISSN Number: 2455-2631

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