Customized Controller Design of Partitioned DDR SDRAM for RF Data Acquisition System
Bhargav B Kulkarni
, Veena N , Girish G K
DDR SDRAM, Data Acquisition, SEU, OTP Actel FPGA
DDR SDRAM (Double Data Rate Synchronous Dynamic RAM) controllers are used to control and command the operations such as recording and reading of data from DDR SDRAM. In real time data acquisition system, the data needs to be stored at very high speed and in environments of outer space. High speed ADCs (Analog to Digital Convertors) are used to convert incoming analog data into digital data for further processing to estimate various pulse parameters. Due to effects like Single Event Upsets (SEU), re-programmable FPGAs cannot be used but high speed OTPs (One Time Programmable) such as Actel FPGA (Field Programmable Gate Arrays) is used for designing the controller.
"Customized Controller Design of Partitioned DDR SDRAM for RF Data Acquisition System ", IJSDR - International Journal of Scientific Development and Research (www.IJSDR.org), ISSN:2455-2631, Vol.1, Issue 7, page no.233 - 237, July-2016, Available :https://ijsdr.org/papers/IJSDR1607041.pdf
Volume 1
Issue 7,
July-2016
Pages : 233 - 237
Paper Reg. ID: IJSDR_160632
Published Paper Id: IJSDR1607041
Downloads: 000346998
Research Area: Engineering
Country: Hubli, Karnataka, India
ISSN: 2455-2631 | IMPACT FACTOR: 9.15 Calculated By Google Scholar | ESTD YEAR: 2016
An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 9.15 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator
Publisher: IJSDR(IJ Publication) Janvi Wave
