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INTERNATIONAL JOURNAL OF SCIENTIFIC DEVELOPMENT AND RESEARCH International Peer Reviewed & Refereed Journals, Open Access Journal ISSN Approved Journal No: 2455-2631 | Impact factor: 8.15 | ESTD Year: 2016 open access , Peer-reviewed, and Refereed Journals, Impact factor 8.15 |
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| Paper Title: | Low power FINFET SRAM design and analysis using leakage current reduction techniques |
| Authors Name: | L.Deepika , P.Suresh , E.Lakshmi Prasanna , M.Ganesh , D.Ramakrishna |
| Unique Id: | IJSDR2404131 |
| Published In: | Volume 9 Issue 4, April-2024 |
| Abstract: | This paper looks at creating a low-power FINFET SRAM and using various methods to cut down on leakage current. Because they may be scaled, the CMOS parameters are not giving lower technology nodes trustworthy values. In an effort to lessen the detrimental effects of MOSFET scaling, researchers are searching for solutions, and FINFET has surfaced as one of the greatest alternatives since it offers superior performance characteristics, such as reduced energy consumption, the removal of short-channel effects, and improved gate control lowers the leakage current in the sub-32 nm range. Since a significant increase in battery-operated portable devices has occurred, electronic devices need to be used for extended periods of time after the battery is fully charged. In order to accomplish this, the gadget should have reduced leakage current. This will allow it to function for extended periods of time with the least amount of leakage power feasible. First, all the parameters were computed and a 6-T CMOS SRAM was designed. The development of DG-FINFET SRAM followed, and all the parameters were computed. Compared to the 6 T SRAM designed using CMOS, the FinFET-based 6 T cell architecture uses a significant amount less power. It has been discovered that SRAM cells have less leakage power than conventional SRAM due to the application of numerous leakage current reduction strategies in FinFET SRAM. |
| Keywords: | FINFET, SRAM, CMOS, leakage current, leakage power etc. |
| Cite Article: | "Low power FINFET SRAM design and analysis using leakage current reduction techniques", International Journal of Science & Engineering Development Research (www.ijsdr.org), ISSN:2455-2631, Vol.9, Issue 4, page no.917 - 930, April-2024, Available :http://www.ijsdr.org/papers/IJSDR2404131.pdf |
| Downloads: | 000338174 |
| Publication Details: | Published Paper ID: IJSDR2404131 Registration ID:210845 Published In: Volume 9 Issue 4, April-2024 DOI (Digital Object Identifier): Page No: 917 - 930 Publisher: IJSDR | www.ijsdr.org ISSN Number: 2455-2631 |
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