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INTERNATIONAL JOURNAL OF SCIENTIFIC DEVELOPMENT AND RESEARCH International Peer Reviewed & Refereed Journals, Open Access Journal ISSN Approved Journal No: 2455-2631 | Impact factor: 8.15 | ESTD Year: 2016 open access , Peer-reviewed, and Refereed Journals, Impact factor 8.15 |
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| Paper Title: | AN EXPORTABLE HIGH SPEED ECC PROCESSOR USING RSD PERFORMED IN FPGA |
| Authors Name: | YERRA RAM CHARAN , MANAS RANJAN BISWAL , DR. NIHAR RANJAN PANDA |
| Unique Id: | IJSDR1911029 |
| Published In: | Volume 4 Issue 11, November-2019 |
| Abstract: | In this proposed paper, an exportable Application-Specific Instruction-set Processor (ASIC) elliptic curve cryptography processor based on redundant signed digit representation. The outcomes of Vertix-6 and Vertix-5 FPGA implementation are performed in this paper. The processor accomplish arthematic operations for NIST recommended curve P256.The design has an methodical modular adder to decrease the carry propagation problem, a high throughput modular divider which outcomes in maximum operating frequency and the processor employs pipelining techniques for Karatsuba–Ofman method to achieve high throughput multiplication. |
| Keywords: | Application-Specific Instruction-set Processor (ASIP), Field Programming Gate Array (FPGA) |
| Cite Article: | "AN EXPORTABLE HIGH SPEED ECC PROCESSOR USING RSD PERFORMED IN FPGA", International Journal of Science & Engineering Development Research (www.ijsdr.org), ISSN:2455-2631, Vol.4, Issue 11, page no.171 - 176, November-2019, Available :http://www.ijsdr.org/papers/IJSDR1911029.pdf |
| Downloads: | 000337067 |
| Publication Details: | Published Paper ID: IJSDR1911029 Registration ID:191122 Published In: Volume 4 Issue 11, November-2019 DOI (Digital Object Identifier): Page No: 171 - 176 Publisher: IJSDR | www.ijsdr.org ISSN Number: 2455-2631 |
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