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IJSDR
INTERNATIONAL JOURNAL OF SCIENTIFIC DEVELOPMENT AND RESEARCH
International Peer Reviewed & Refereed Journals, Open Access Journal
ISSN Approved Journal No: 2455-2631 | Impact factor: 8.15 | ESTD Year: 2016
open access , Peer-reviewed, and Refereed Journals, Impact factor 8.15

Issue: April 2024

Volume 9 | Issue 4

Impact factor: 8.15

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Paper Title: A 45nm CMOS Technology Exploring low power and Fast 4 bit Full Adder using XOR/XNOR Gates
Authors Name: M.VENKAYYA NAIDU , Y.SRAVANA KUMAR , ALAJANGI.RAMAKRISHNA
Unique Id: IJSDR1911027
Published In: Volume 4 Issue 11, November-2019
Abstract: In this paper, novel circuits for XOR/XNOR and concurrent XOR–XNOR functions area unit planned. The planned circuits area unit extremely optimized in terms of the ability consumption and delay, that area unit thanks to low output capacitance and low short-circuit power dissipation. We also propose six new hybrid Ripple Carry Adders based on the six new hybrid 1-bit full-adder (FA) circuits based on the novel full-swing XOR–XNOR or XOR/XNOR gates. Each of the planned circuits has its own deserves in terms of speed, power consumption, power delay product (PDP), driving ability, and so on. To investigate the performance of the proposed designs, extensive HSPICE and Cadence Virtuoso simulations are performed. The simulation results supported the 45-nm CMOS method technology model, indicate that the planned styles have superior speed and power against different Ripple Carry Adder designs. A new transistor size technique is given to optimize the PDP of the circuits. In the proposed method, the numerical computation particle swarm optimization algorithm is used to achieve the desired value for optimum PDP with fewer iterations. The proposed circuits are investigated in terms of variations of the supply and threshold voltages, output capacitance, input noise immunity, and the size of transistors.
Keywords: PDP, XOR, XNOR, Full Adder, RCA, Threshold Voltage
Cite Article: "A 45nm CMOS Technology Exploring low power and Fast 4 bit Full Adder using XOR/XNOR Gates", International Journal of Science & Engineering Development Research (www.ijsdr.org), ISSN:2455-2631, Vol.4, Issue 11, page no.156 - 165, November-2019, Available :http://www.ijsdr.org/papers/IJSDR1911027.pdf
Downloads: 000337076
Publication Details: Published Paper ID: IJSDR1911027
Registration ID:191131
Published In: Volume 4 Issue 11, November-2019
DOI (Digital Object Identifier):
Page No: 156 - 165
Publisher: IJSDR | www.ijsdr.org
ISSN Number: 2455-2631

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