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Paper Title: Modified Orthogonal Latin Square Codes for SEC-DAEC-DAAEC-TAEC
Authors Name: Shruthymol T.D , Reneesh C Zacharia
Unique Id: IJSDR1607048
Published In: Volume 1 Issue 7, July-2016
Abstract: As integrated circuit technology scales into the deep-submicron regime, radiation-induced soft errors threat the reliability of on-chip memory applications. To ensure that memory contents are not corrupted, Single Error correction Double Error Detection (SEC-DED) codes, are commonly used, however in advanced technology nodes, soft errors frequently affect more than one memory bit. Since SEC-DED affect more than one memory bit. Since SEC-DED codes cannot correct multiple errors, they are often combined with interleaving. Recently Single Error Correction- Double Adjacent Error Correction-Double Almost Adjacent Error Correction-Triple Adjacent Error Correction Codes (SEC-DAEC-DAAEC-TAEC) are presented to correct these errors. However, these conventional codes requires more area and delay.To obviate these drawback Modified Orthogonal Latin Square Codes for SEC-DAEC-DAAEC-TAEC Codes has been proposed.. The proposed codes have been implemented in Hardware Description Language and compared with some of the conventional SEC-DAEC-DAAEC-TAEC error correction code.
Keywords: Double Adjacent Error correction, error correction codes, memory, Orthogonal Latin Squares (OLS), Single Error Correction Double Error Detection .
Cite Article: "Modified Orthogonal Latin Square Codes for SEC-DAEC-DAAEC-TAEC", International Journal of Science & Engineering Development Research (www.ijsdr.org), ISSN:2455-2631, Vol.1, Issue 7, page no.279 - 286, July-2016, Available :http://www.ijsdr.org/papers/IJSDR1607048.pdf
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Publication Details: Published Paper ID: IJSDR1607048
Registration ID:160627
Published In: Volume 1 Issue 7, July-2016
DOI (Digital Object Identifier):
Page No: 279 - 286
Publisher: IJSDR | www.ijsdr.org
ISSN Number: 2455-2631

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